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In this paper, a new CMOS exponential circuit with improved linear output range is presented. The proposed circuit is based on a new approximation function to increase the dB-linear output range. Simulation results in a 0.35 µm standard CMOS technology using HSPICE reveal an output range of 78 dB with errors less than ±1 dB. Also the Monte-Carlo simulation results for the threshold voltage variations...
This paper presents two integrated class-A travelling wave medium power amplifiers employing 0.35µm SiGe HBT process. The first amplifier realized is a 1.3×1mm2 device comprising of a single-stage configuration using a single transistor that exhibits an average small-signal gain of 7dB and power level of 14dBm between 0.25 to 2.5GHz while maintaining power-added efficiency in the range 30% to 10%...
The Fibonacci Switched-Capacitor (SC) converter demonstrates the highest performance by using minimum number of capacitors. However, as the Fibonacci SC requires a wide range of voltage rating of the devices, its implementation is difficult. This paper presents two gate driving techniques for designing and implementing two-phase Fibonacci SC converter for both low and high step-up conversion ratios...
Recently, fine-pattern process approaching to physical limit and the rise of heat density become major factors of reliability degradation of LSIs. Especially reliability problems in power grids occur more notably in vias. The optimization of via design in consideration of the influence of heat and current density is increasing the importance. This paper formulates via reliability with the mean life...
Recognition of banknotes is a prevalent problem for blind and visually impaired people. The bionic eyeglass is a mobile platform that integrates several common visual detection and recognition functions. Relevant shapes are extracted from the image flow of the banknote shown to the mobile camera using adaptive thresholding and morphological shape filters. In a two-level classification scheme different...
A digital wave filter operating on bandpass sigma-delta (SD) modulated signals is presented in this paper. The filter is obtained by a z-domain transformation of a baseband SD domain filter which is a binary-quantized discrete model of an analog distributed parameter filter (ADPF). Thus, the design properties of various ADPFs can be utilized for constructing the presented type of digital filters....
In low-rate UWB impulse radio the carrier pulses have very short duration that limits the energy per bit in an extremely low value. The low bit energy results in an unacceptable short radio coverage. In the paper new UWB carrier pulse generation techniques are proposed to increase the pulse duration considerably. In order to get an ultra wideband carrier a spectrum widening signal is used. Using this...
The energy transmitted per bit limits the radio coverage. In impulse radio the UWB pulses used carry a very little energy since they are extremely short. As a consequence the radio coverage is unacceptable short. A solution to increase the energy per bit is the enlargement of the duration of UWB carrier pulse, however, this solution cannot be used because the correlation of received pulse envelope...
This article presents the optimization process for a new architecture of digital-enhanced radio frequency receiver. This receiver is based on combining charge sampling filters and hybrid filter banks techniques. We describe the structure optimization based on a compromise between performance and implementation constraints. We then show the performances evaluation in system-level and electrical level...
Power consumption has been recognized as a grand challenge for nanoelectronics. With continuous scaling, wires (much more than devices) are going to be determining (almost entirely) the dynamic power: (i) their numbers are increasing exponentially, as each device needs a few wires; and (ii) they do not scale well, as their parasitic capacitances and RC-delays are not scaling in synch with device scaling...
Matrix inversion is sensitive towards the number representation used. In this paper simulations of matrix inversion with numbers represented in the fixed-point and logarithmic number systems (LNS) are presented. A software framework has been implemented to allow extensive simulation of finite wordlength matrix inversion. Six different algorithms have been used and results on matrix condition number,...
In this work a systematic method to generate all possible fast Fourier transform (FFT) algorithms is proposed based on the relation to binary trees. The binary tree is used to represent the decomposition of a discrete Fourier transform (DFT) into sub-DFTs. The radix is adaptively changed according to compute sub-DFTs in proposed decomposition. In this work we determine the number of possible algorithms...
High performance implementations of unary functions are important in many applications e.g. in the wireless communication area. This paper shows the development and VLSI implementation of unary functions like the logarithmic and exponential function, by using a novel approximation methodology based on parabolic synthesis, which is compared to the well known CORDIC algorithm. Both designs are synthesized...
The optimization of fixed coefficient FIR filter implementation has been focused mainly on the multiplier block where full precision fixed point arithmetic is normally used. Recently, an optimization method was proposed for the structural adders in FIR filters. This paper further proposes a method for gradually reducing the number of fractional bits within the structural adder block such that the...
Driver circuit of the small Liquid Crystal Display (LCD) is formed on the same glass substrate as LCD by means of the so-called SoG (System on Glass) technology. The timing pulse generator of LCD driver, which is to generate trigger signals for driving each pixel, is usually laid out restrictedly in an area remaining after the layout of other subcircuits in LCD driver. Thus, if the design automation...
The paper presents a package of arithmetic operation synthesis dedicated to reconfigurable logic controllers programmed according to IEC1131 and EN61131. The program is compiled to hardware structure with a massive parallel processing. The developed method automatically allocates resources and operations. It controls resource usage and operation timing. Using mixed concept of operation allocation...
This paper addresses the problem of the stability and the performance analysis of N-nodes cartesian networks of self-sampled all digital phase-locked loops. It can be demonstrated that under certain conditions (such as proper filter coefficient values), a global and a local synchronization can be obtained. Our approach to find the optimal conditions consists of analyzing a corresponding linear average...
An ideal memristor with single-valued odd-symmetric charge-flux nonlinearity is extensively proposed for chaos-based applications. However, according to our boundary condition-based memristor model, the nonlinearity of a memristor nano-structure is in general multi-valued with strong dependence on input and initial conditions. Nevertheless, provided the model is augmented with suitable boundary conditions,...
An efficient and practical method is proposed for finding all solutions of piecewise-linear resistive circuits using integer programming. In this method, we formulate the problem of finding all solutions by a mixed integer programming problem, and solve it by a high-performance integer programming software such as GLPK, SCIP, or CPLEX. It is shown that the proposed method can be easily implemented...
This paper considers the analysis and the design of an array of two NMOS differential oscillators coupled through a resistor. A new writing of the nonlinear equations proposed by R. York to describe the oscillators' locked states but limited for the specific case of a resistive coupling is presented. The new system permits the calculation of the free-running frequencies of the oscillators when a specific...
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